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128-Bit

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128 bits is 16 bytes

128-bit

While there are currently no mainstream general-purpose processors built to operate on 128-bit integers or 128-bit addresses, a number of processors do have specialized ways to operate on 128-bit chunks of data.

Representation

128-bit processors could be used for addressing directly up to 2¹²⁸ (over 3.40×1038 bytes, which would greatly exceed the total data captured, created, or replicated on Earth as of 2018, which has been estimated to be around 33 zettabytes (over 2⁷⁴ bytes).¹⁾

A 128-bit register can store 2¹²⁸ (over 3.40 × 10³⁸) different values. The range of integer values that can be stored in 128 bits depends on the Value and representation | integer representation used. With the two most common representations, the range is 0 through 340,

282,

366,

920,

938,

463,

374,

607,

431,

768,

211,

455 (2¹²⁸ − 1) for representation as an (signedness | unsigned) binary number, and −170,

141,

183,

460,

469,

231,

731,

687,

303,

715,

884,

105,

728 (−2¹²⁷) through 170,

141,

183,

460,

469,

231,

731,

687,

303,

715,

884,

105,

727 (2¹²⁷ − 1) for representation as two's complement.

Quadruple-precision floating-point format | Quadruple precision (128-bit) floating-point arithmetic | floating-point numbers can store 113-bit fixed-point arithmetic | fixed-point numbers or integer (computer science) | integers accurately without losing significant figures | precision (thus 64-bit integers in particular). Quadruple precision floats can also represent any position in the observable universe with at least micrometer precision.

Decimal128 floating-point numbers can represent numbers with up to 34 significant digits.

History

A 128-bit multicomparator was described by researchers in 1976.<ref>

</ref>

The IBM System/360 Model 85,<ref>

</ref> and IBM System/370 and its successors, support 128-bit floating-point arithmetic.

The Siemens 7.700 and 7.500 series mainframes and their successors support 128-bit floating-point arithmetic.<ref>

</ref>

Most modern CPUs feature single instruction, multiple data (SIMD) instruction sets (Streaming SIMD Extensions, AltiVec etc.) where 128-bit vector registers are used to store several smaller numbers, such as four 32-bit floating-point numbers. A single instruction can then operate on all these values in parallel. However, these processors do not operate on individual numbers that are 128 binary digits in length; only their vector registers have the size of 128 bits.

The DEC VAX supported operations on 128-bit integer ('O' or octaword) and 128-bit floating-point ('H-float' or HFLOAT) datatypes. Support for such operations was an upgrade option rather than being a standard feature. Since the VAX's registers were 32 bits wide, a 128-bit operation used four consecutive registers or four longwords in memory.

The ICL 2900 Series provided a 128-bit accumulator, and its instruction set included 128-bit floating-point and packed decimal arithmetic.

A CPU with 128-bit multimedia extensions was designed by researchers in 1999.<ref>

</ref>

The Dreamcast and the PlayStation 2 among the Sixth generation of video game consoles used the term “128-bit” in their marketing to describe their capability. The Playstation 2's CPU had 128-bit Single instruction, multiple data | SIMD capabilities.<ref name=“CAAQA”>John L. Hennessy and David Patterson (scientist) | David A. Patterson. “Computer Architecture: A Quantitative Approach, Third Edition”.

</ref><ref name=“MPR”>Keith Diefendorff. “Sony's Emotionally Charged Chip”. Microprocessor Report, Volume 13, Number 5, April 19, 1999. Microdesign Resources.</ref> Neither console supported 128-bit addressing or 128-bit integer arithmetic.

Hardware

The RISC-V ISA specification from 2016 includes a reservation for a 128-bit version of the architecture, but the details remain undefined intentionally, because there is yet so little practical experience with such large memory systems.<ref name=“isa”>

</ref>

Graphics processing unit (GPU) chips commonly move data across a 128-bit bus.<ref>

</ref>

Software

In the same way that compilers emulate e.g. 64-bit integer arithmetic on architectures with register sizes less than 64 bits, some compilers also support 128-bit integer arithmetic. For example, the GNU Compiler Collection | GCC C compiler 4.6 and later has a 128-bit integer type

__int128

for some architectures.<ref>

</ref> GCC and compatible compilers signal the presence of 128-bit arithmetic when the macro

__SIZEOF_INT128__

is defined.<ref>

</ref> For the C programming language, 128-bit support is optional, e.g. via the

int128_t

type, or it can be implemented by a compiler-specific extension. The Rust (programming language) | Rust programming language has built-in support for 128-bit integers (originally via LLVM), which is implemented on all platforms.<ref>

</ref> A 128-bit type provided by a C compiler can be available in Perl via the

Math::Int128

module.<ref>

</ref>

Uses

The free software used to implement RISC-V CPU architecture | architecture is defined for 32, 64 and 128 bits of integer data width.
Universally unique identifiers (UUID) consist of a 128-bit value.
IPv6 routes computer network traffic amongst a 128-bit range of addresses.
ZFS is a 128-bit file system.
128 bits is a common key size for symmetric ciphers and a common block size for block ciphers in cryptography.
The IBM i virtual instruction set defines all pointers as 128-bit. This gets translated to the hardware's real instruction set as required, allowing the underlying hardware to change without needing to recompile the software. Past hardware was 48-bit Complex instruction set computer | CISC, while current hardware is 64-bit PowerPC. Because pointers are defined to be 128-bit, future hardware may be 128-bit without software incompatibility.
Increasing the word size can speed up Arbitrary-precision arithmetic | multiple precision mathematical libraries, with applications to cryptography, and potentially speed up algorithms used in complex mathematical processing (numerical analysis, signal processing, complex photo manipulation | photo editing and audio signal processing | audio and video processing).
MD5 is a hash function producing a 128-bit hash value.
Apache Avro uses a 128-bit random number as synchronization marker for efficient splitting of data files.<ref>
</ref><ref>

</ref>